1. Field of the Invention
The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device packaged so that a semiconductor chip and leads are electrically connected to inner lead portions and outer lead portions integral with the inner lead portions extend from a package.
As the integration density increases, a packaged semiconductor device needs an increased number of terminals or pins. Further, an increase in the integration density lengthens leads and bonding wires. As the leads and wires become long, the inductances thereof are increased. Particularly, when the semiconductor device operates at high speed, an increase in the impedance of the leads and wires causes noise superposed on power supply lines. With the above in mind, various attempts have been proposed to increase the electric characteristics related to packaging.
As is known, the electric characteristics of the packaged semiconductor devices depend on the performance of packaging. The packaging is required to obtain low inductance, low dielectric constant and low resistance characteristics.
2. Description of the Prior Art
A plastic package is widely used. FIGS. 1A and 1B show a packaged semiconductor device 11 having a plastic package. More particularly, FIG. 1A is a cross-sectional view of the plastic-packaged semiconductor device 11, and FIG. 1B is a plan view of a lead frame used in the device 11.
The semiconductor device 11 includes a semiconductor chip or element 13 mounted on a stage 12a of a single lead frame 12, which includes supporting bars 12b extending from the four corners of the lead frame 12. A predetermined number of leads 12c are provided between the adjacent supporting bars 12b. Portions of the leads 12c located inside the package after the packaging process are called inner leads 12c1, and portions thereof located outside of the package are called outer leads (not shown for the sake of simplicity). The supporting bars 12b and the leads 12c1 are integrally formed and supported by a supporting frame (not shown). A Ring-shaped polyimide tape 14 is attached on the leads 12c (more strictly, the inner leads 12c).
The semiconductor chip 13 mounted on the stage 12a have electrode pads formed thereon. These pads are connected to the ends of the inner leads 12c1 by wire bonding (wires are not shown for the sake of simplicity). Then, the semiconductor chip 13 is placed in a die and packaged by a resin molding process. Thereafter, the portions of the leads 12 outside of the package are cut so as to form the outer leads having a predetermined length. Further, the supporting bars 12b are cut on a package surface 15.
The plastic packages are widely used. However, the plastic packages do not completely meet the requirements of high integration density, high operation speed and high power. Particularly, the leads 12c are long and have large inductances.
A multi-frame structure as shown in FIGS. 2A and 2B has been proposed in order to particularly reduce the inductances of a power supply system (which includes a power supply line and a ground line). More particularly, FIG. 2A shows a lead-part frame 20, and FIG. 2B is a stage-part frame 24. The lead-part frame 20 includes tie bars 22 between cradles 21. A predetermined number of leads 23a extend inward from the tie bars 22. A ring-shaped bus bar 23b is integrally provided so that the bus bar 23b places the leads 23a inside thereof. The above parts are integrally formed. The stage-part frame 24 has a stage supported by supporting bars 26a and 26b extending from cradles 25. These parts are integrally formed. A semiconductor chip 28 (pads 28a) are mounted on the stage 27 by an adhesive.
Other attempts have been proposed in order to improve the electric characteristics based on packaging.
FIG. 3A shows a conventional DIP-type semiconductor device 31A having a ceramic package. The device 31A includes a semiconductor chip 33 mounted on the bottom surface of a cavity formed in a base 32 and fixed thereto by an adhesive 34. A lead frame 36a is fixed to the base 32 by a sealing glass layer 35a. Inner leads of the lead frame 36a and the semiconductor chip 33 are electrically bonded together by wires 37. A cap 38 made of a ceramic is fixed by a sealing glass layer 35b, and the semiconductor chip 33 is hermetically sealed. Outer leads of the lead frame 36a are bent, as shown in FIG. 3A.
FIG. 3B shows a variation 31B of the semiconductor device 31A shown in FIG. 3A. The outer leads of the lead frame 36a are bent so that a gull-wing lead structure is formed. The outer leads of the lead frame 36a may be bent so that the outer leads are of an approximately J-shaped structure.
Recently, ECL (Emitter-Coupled Logic) devices, Bi-CMOS (Bipolar-Complementary Metal Oxide Semiconductor) devices, compound semiconductor devices (GaAs devices and so on), and even CMOS devices have been operated at a high frequency in the range of tens of mega-hertz (MHz) to a few giga-hertz (GHz) and have consumed a large amount of power between a few watts (W) and tens of watts. Nowadays, semiconductor chips used in the above devices have been provided in surface-mounting type ceramic packages, which utilize a stacked body made up of a plurality of alumina ceramic layers and plane layers used for power supply are formed on the alumina ceramic layers. The mutual connections between the plane layers are made by means of via holes formed in the alumina ceramic layers. Such plane layers contribute to reduction in the inductances of the power supply system and increase in the capacity of supplying power.
FIGS. 3C and 3D show a semiconductor device 31c having a ceramic package. In FIG. 3D, a cap has been removed. The semiconductor device 31c includes a surface-mounting type quad flat package (QFP) and has a two-layer Cerquad (ceramic quad) structure. An Al (aluminum) plane film 42 is formed on a ceramic base 41 by an evaporation process. A semiconductor chip 44 is mounted on the center portion of the aluminum film 42 by an adhesive 43 of silver glass. A lead frame 45 is fixed to the peripheral surface portion of the aluminum film 42 via a refractory-glass layer 46 having an opening. The semiconductor chip 44, the Al film 42 and the inner leads of the lead frame 45 are electrically connected by Al wires 47, as shown in FIG. 3C.
Further, a refractory-glass layer 46A is formed on outer portions of the inner leads of the lead frame 45, and a crystallized glass layer 48 is formed on inner portions of the inner leads. A cap 49 having a recess portion 49a corresponding to the semiconductor chip 44 is fixed by the refractory-glass layer 46A and the crystallized glass layer 48. The Al film 42 is used as a power supply layer which carries a high-potential or low-potential power supply voltage. Normally, either the high-potential or the low-potential power supply voltage is the ground level. The A1 film 42 is connected to the corresponding inner leads of the lead frame 45 by the Al wires 47. The outer leads of the lead frame 45 are bent so as to have an approximately L-shaped structure. The structure shown in FIGS. 3C and 3D is called a two-layer Cerquad structure in which the Al film 42 is formed on the base 41 and the lead frame 45 is connected to the Al film 42 by the Al wires 47.
The semiconductor device shown in FIGS. 1A and 1B has a disadvantage in that the leads and wires are long and hence have large inductances. The semiconductor device shown in FIGS. 2A and 2B has disadvantages in which the multi-frame structure increases the production cost and the leads connecting the power supply systems having the power supply lines and the ground lines of the multi-frame structure to a circuit formed on a printed circuit board still have large inductances.
The semiconductor devices shown in FIGS. 3A, 3B, 3C and 3D use the bonding wires 37 and 47, which have large inductances. Particularly, the Al film 42 shown in FIGS. 3C and 3D is connected to the lead frame 45 by the Al wires which have large inductances. Further, in the structure shown in FIGS. 3C and 3D, if it is required to provide a plurality of power supply system in the semiconductor device 31c, it is necessary to provide a plurality of power supply layers which need a plurality of stacked ceramic members.